نویسندگان
1 گروه الکترونیک، دانشکده برق، دانشگاه صنعتی نوشیروانی بابل، دکترای الکترونیک
2 دانشگاه صنعتی بابل، کارشناس ارشد الکترونیک
3 گروه مخابرات، دانشکده برق، دانشگاه صنعتی نوشیروانی بابل، دکترای الکترونیک
چکیده
کلیدواژهها
عنوان مقاله [English]
نویسندگان [English]
Application of SRAM-based FPGAs in harsh environments like industrial, military and space locations has attracted many engineers due to their reconfiguribility. However, they are vulnerable to SEU (Single Effect Upset) effects in the mentioned conditions. Hamming code is used in the switch modules of SRAM-based FPGAs for SEU mitigation. The method is capable of correcting single bit errors, however; in recent high density SRAMs, a high energy particle can affect multi-bits that are usually adjacent cells. In this paper two new selective bit placements are proposed for switch level that has led to improved adjacent error detection from 11.11% to 66.66% in the switch box and an increase of detection rate from 3.75% to 75% in switch modules. In addition, another optimized utilization of shortened Hamming code is proposed based on Genetic Algorithm that results in 88.88% detection rate of adjacent bit error in switch box level. The proposed methods do not burden any extra redundancy.
کلیدواژهها [English]
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