نویسندگان
1 دانشگاه شاهد، کارشناسی ارشد
2 دانشگاه شاهد، استادیار، دکترای برق
چکیده
کلیدواژهها
عنوان مقاله [English]
نویسندگان [English]
A CMOS voltage reference based on difference voltage between the gate - source voltages of a PMOS transistor
and two NMOS transistors is presented. To reduce current consumption and thus to optimize power
consumption, the number of passive elements is minimized and all of the transistors are biased in the subthreshold
region. In addition, in order to improve power supply rejection ratio (PSRR), supply-independent
biasing technique is utilized in bias section. Current consumption of this voltage reference at a supply voltage of
3.3 V is about 154 nA while 1.27 V reference voltage is produced. Temperature coefficient of this voltage
reference is about 59 ppm/C. Power supply rejection ratio at 100 Hz and 10 MHz frequencies are -92 dB and -
66 dB, respectively. The proposed voltage reference provides a constant voltage to be used along with a
regulator and the design is suitable for using in contactless smart cards.
کلیدواژهها [English]
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